1. Field of Invention
The present invention relates to a buck-boost switching regulator and a control circuit and a method for controlling the buck-boost switching regulator.
2. Description of Related Art
Referring to FIG. 1, U.S. Pat. No. 6,166,527 discloses a method for controlling a buck-boost switching regulator. The buck-boost switching regulator comprises an inductor L, four power switches A, B, C and D, and a control circuit 20. The control circuit 20 controls the switching operations of the four power switches A, B, C and D to convert an input voltage Vin to an output voltage Vout. The input voltage Vin may be higher or lower than the output voltage Vout, and therefore the regulator may need to perform buck or boost conversion. In the control circuit 20, an error amplifier 22 compares a feedback signal FB (indicating information relating to the output voltage Vout) with a reference voltage Vref, and generates an error amplified signal Vea. PWM comparators 27 and 28 compare the error amplified signal Vea with voltage wave signals VX and VY respectively, and a logic circuit 29 generates switching control signals VA, VB, VC, and VD to control the corresponding power switches A, B, C, and D according to the outputs from the PWM comparators 27 and 28.
The relationships among the error amplified signal Vea, the voltage wave signals VX and VY, and the switching control signals VA, VB, VC and VD are shown in FIG. 2. When the error amplified signal Vea is between V1 and V2, the regulator operates in a buck conversion mode. When the error amplified signal Vea is between V2 and V3, the regulator operates in a buck-boost conversion mode. When the error amplified signal Vea is between V3 and V4, the regulator operates in a boost conversion mode. When the regulator is operating in the buck conversion mode, the power switch C is kept off and the power switch D is kept on. When the regulator is operating in the boost conversion mode, the power switch A is kept on and the power switch B is kept off. When the regulator is operating in the buck-boost conversion mode, as shown in the FIG. 2, the switching control signals VA and VB are generated according to the relationship between the error amplified signal Vea and the voltage wave signal VX, and the switching control signals VC and VD are generated according to the relationship between the error amplified signal Vea and the voltage wave signal VY. In other words, the regulator is operating in mixed operations including both boost conversion (the power switches C and D operating) and buck conversion (the power switches A and B operating).
The aforementioned prior art has a feature that all the power switches A, B, C and D operate according to the feedback signal FB all the time. The drawback of this kind of arrangement is shown in FIG. 2. When the error amplified signal Vea intersects with the voltage wave signal VX by a very small period, the switching control signals VA and VB are still generated to turn on/off the power switches A and B. This causes switching loss and increases the power consumption. The same condition occurs when the error amplified signal Vea intersects with the voltage wave signal VY by a very small period.
FIG. 3 shows a structure of another prior art U.S. Pat. No. 7,176,667. The prior art uses the error amplifier 22 to generate two error amplified signals Vea1 and Vea2, one of which is chosen to be compared with a voltage wave OSC in the PWM comparators 27. In addition, a fixed pulse width signal generation circuit 25 is provided, and the logic circuit 29 generates the switching control signals VA, VB, VC and VD to control the power switches A, B, C and D respectively according to the outputs from the PWM comparator 27 and the fixed pulse width signal generation circuit 25.
Referring to FIG. 4, U.S. Pat. No. 7,176,667 includes four conversion modes: besides the buck conversion mode M1 and the boost conversion mode M4, a transient buck conversion mode M2 and a transient boost conversion mode M3 are provided between M1 and M4. In the transient buck conversion mode M2, the switching control signals VA and VB follow the output of the PWM comparator 27 and the switching control signals VC and VD have fixed pulse widths. In the transient boost conversion mode M3, the switching control signals VC and VD follow the output of the PWM comparator 27 and the switching control signals VA and VB have fixed pulse widths.
The aforementioned prior art has the drawbacks that a more complicated control mechanism is required for four conversion modes, and that an additional fixed pulse width signal generation circuit 25 and other circuit devices are required. Furthermore, two transient conversion modes (M2 and M3) increase opportunities for the circuit to operate therein, wherein all the four power switches are operating, increasing the switching loss and the power consumption.
In view of the above drawbacks, it is desired to provide a buck-boost switching regulator and a control circuit and a method for controlling the buck-boost switching regulator, that can decrease the switching loss and the power consumption and enhance the power conversion efficiency of the regulator.